NSF Nano Fabrication of Nano wire Transistors
This project will develop a nano fabrication process that uses photolithography and can be easily implemented into the semiconductor industry. The project will focus on the development and characterization of the deposition procedure. Initial modeling will be conducted on nano wire electronics to allow for test data sets to be created for comparison of nano electronic devices that will be fabricated during the second stage of this project. The final fabrication procedure will be easily integrated into today semiconductor fabrication processes. The developed fabrication technique will be compatible with mass production capabilities as well as surpass the current limitations of device sizes found in industry. This process could allow for the mass production of nano electronics devices that would surpass any mass-produced electronics commercially available in today’s market.
Nanoscale Devices
Due to limitations in size, speed, reliability in current microelectronic devices there has become a need for development of a new paradigm of electronics. The best solution to this problem would be the development of nano based electronic systems. Currently research is being performed in several areas of nanoelectronics in hopes of find in suitable solution to the microelectronics industry. For this reason CVD proposes to use a patented fabrication process that would allow for the development of these complex systems without the need of new expensive equipment. The nanoelectronic system described in this proposal will be defined with either photolithography or no lithography (direct deposition). This process is also very compatible with the mass production parallel process that is currently used in the semiconductor industry today. CVD has also proposed new I/O connection techniques that will allow for the further development of nano-based electronics without the need for complex connection circuitry. Both these newly developed ideas will allow for nanoelectronics to become a reality.
Nano Fabrication Patent (Click to see Patent Application)
The success of semiconductor-based devices has resulted in large part from improvements that have allowed for the placement of more and more individual components on the same sized semiconductor substrate. Current lithographic technology is unable to effectively produce features smaller than a 100nm. Given the nature of the consumer electronics industry, in order to continue the development of smaller and faster semiconductor based equipment it will be necessary that new techniques produce smaller features than is presently possible. Concomitant with the production of smaller features will be the need for the new techniques to be applicable to the mass production of semiconductor chips. There is therefore a need for a method and apparatus for producing semiconductor features on substrates that are below 100 nanometers in size, with high throughput. The present invention fills such a need.